Invention Grant
- Patent Title: System for testing error detection circuits
- Patent Title (中): 错误检测电路测试系统
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Application No.: US13547049Application Date: 2012-07-12
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Publication No.: US08868989B2Publication Date: 2014-10-21
- Inventor: Amit Jindal , Nitin Singh
- Applicant: Amit Jindal , Nitin Singh
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G01R31/28 ; G06F11/22

Abstract:
A system for testing an error detection circuit includes a fault injection unit for operating the error detection circuit in a fault injection mode. A fault is inserted in either of a primary or a redundant processor. Output signals generated by the primary and redundant processors are compared and checked for a mismatch and the error detection circuit outputs a test signal based on the comparison result.
Public/Granted literature
- US20140019818A1 SYSTEM FOR TESTING ERROR DETECTION CIRCUITS Public/Granted day:2014-01-16
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