Invention Grant
- Patent Title: Generation of internal interfaces for a block-based design
- Patent Title (中): 生成基于块的设计的内部接口
-
Application No.: US14185832Application Date: 2014-02-20
-
Publication No.: US08875073B1Publication Date: 2014-10-28
- Inventor: Arvind Sundararajan , Jinsong Du
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent W. Eric Webostad; David Parandoosh
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F9/455
Abstract:
A method relating generally to computer aided design is disclosed. In such method, a block-based model of a hardware realizable system is obtained. An internal gateway-in and an internal gateway-out of a module of the block-based model are identified. An interface protocol is assigned for the internal gateway-in and the internal gateway-out. Data type and data propagation for the module at the internal gateway-in and the internal gateway-out are analyzed. The internal gateway-in and the gateway-out are transformed into an input/output interface. Integrated code is generated for subsequent realization of the input/output interface in hardware.
Information query
