Invention Grant
- Patent Title: Routing method for flip chip package and apparatus using the same
- Patent Title (中): 倒装芯片封装的路由方法及其使用方法
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Application No.: US14045090Application Date: 2013-10-03
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Publication No.: US08875083B2Publication Date: 2014-10-28
- Inventor: Chen-Feng Chang , Chin-Fang Shen , Hsien-Shih Chiu , I-Jye Lin , Tien-Chang Hsu , Yao-Wen Chang , Chun-Wei Lin , Po-Wei Lee
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Young, Basile, Hanlon & MacFarlane, P.C.
- Priority: CN200910209629 20091030; CN200910209631 20091030
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L23/00 ; H01L23/525

Abstract:
Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.
Public/Granted literature
- US20140033156A1 ROUTING METHOD FOR FLIP CHIP PACKAGE AND APPARATUS USING THE SAME Public/Granted day:2014-01-30
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