Invention Grant
- Patent Title: Method for manufacturing a hybrid SOI/bulk semiconductor wafer
- Patent Title (中): 混合SOI /体半导体晶片的制造方法
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Application No.: US14104903Application Date: 2013-12-12
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Publication No.: US08877600B2Publication Date: 2014-11-04
- Inventor: Claire Fenouillet-Beranger , Stephane Denorme , Nicolas Loubet , Qing Liu , Emmanuel Richard , Pierre Perreau
- Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics S.A. , STMicroelectronics, Inc. , Commissariat à l'Énergie Atomique et aux Énergies Alternatives
- Applicant Address: US TX Coppell FR Montrouge FR Crolles FR Paris
- Assignee: STMicroelectronics, Inc.,STMicroelectronics SA,STMicroelectronics (Crolles 2) SAS,Commissariat à l'Énergie Atomique et aux Énergies Alternatives
- Current Assignee: STMicroelectronics, Inc.,STMicroelectronics SA,STMicroelectronics (Crolles 2) SAS,Commissariat à l'Énergie Atomique et aux Énergies Alternatives
- Current Assignee Address: US TX Coppell FR Montrouge FR Crolles FR Paris
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1262012 20121213
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/762

Abstract:
A method for manufacturing a hybrid SOI/bulk substrate, including the steps of starting from an SOI wafer comprising a single-crystal semiconductor layer called SOI layer, on an insulating layer, on a single-crystal semiconductor substrate; depositing on the SOI layer at least one masking layer and forming openings crossing the masking layer, the SOI layer, and the insulating layer, to reach the substrate; growing by a repeated alternation of selective epitaxy and partial etching steps a semiconductor material; and etching insulating trenches surrounding said openings filled with semiconductor material, while encroaching inwards over the periphery of the openings.
Public/Granted literature
- US20140170834A1 METHOD FOR MANUFACTURING A HYBRID SOI/BULK SEMICONDUCTOR WAFER Public/Granted day:2014-06-19
Information query
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