Invention Grant
- Patent Title: Low cost fabrication of double box back gate silicon-on-insulator wafers with subsequent self aligned shallow trench isolation
- Patent Title (中): 低成本制造双盒背栅硅绝缘体上晶圆,随后自对准浅沟槽隔离
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Application No.: US13350889Application Date: 2012-01-16
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Publication No.: US08877606B2Publication Date: 2014-11-04
- Inventor: Robert H. Dennard , David R. Greenberg , Amlan Majumdar , Leathen Shi , Jeng-Bang Yau
- Applicant: Robert H. Dennard , David R. Greenberg , Amlan Majumdar , Leathen Shi , Jeng-Bang Yau
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L27/12 ; H01L21/762 ; H01L21/84

Abstract:
A semiconductor substrate structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer; an insulator with etch stop characteristics formed on the electrically conductive layer; an upper insulating layer formed on the etch stop layer; and a semiconductor layer formed on the upper insulating layer. A scheme of subsequently building a dual-depth shallow trench isolation with the deeper STI in the back gate layer self-aligned to the shallower STI in the active region in such a semiconductor substrate is also disclosed.
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