Invention Grant
- Patent Title: Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same
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Application No.: US13852103Application Date: 2013-03-28
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Publication No.: US08878311B2Publication Date: 2014-11-04
- Inventor: Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Pranita Kerber , Christian Lavoie
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Harrington & Smith
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8238 ; H01L21/285 ; H01L29/417 ; H01L23/485 ; H01L27/12 ; H01L21/768 ; H01L21/84 ; H01L27/105 ; H01L29/66

Abstract:
A structure has at least one field effect transistor having a gate stack disposed between raised source drain structures that are adjacent to the gate stack. The gate stack and raised source drain structures are disposed on a surface of a semiconductor material. The structure further includes a layer of field dielectric overlying the gate stack and raised source drain structures and first contact metal and second contact metal extending through the layer of field dielectric. The first contact metal terminates in a first trench formed through a top surface of a first raised source drain structure, and the second contact metal terminates in a second trench formed through a top surface of a second raised source drain structure. Each trench has silicide formed on sidewalls and a bottom surface of at least a portion of the trench. Methods to fabricate the structure are also disclosed.
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