Invention Grant
US08878566B2 Reconfigurable circuit 有权
可重构电路

  • Patent Title: Reconfigurable circuit
  • Patent Title (中): 可重构电路
  • Application No.: US13821892
    Application Date: 2011-08-18
  • Publication No.: US08878566B2
    Publication Date: 2014-11-04
  • Inventor: Shogo Nakaya
  • Applicant: Shogo Nakaya
  • Applicant Address: JP Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JP Tokyo
  • Agency: Sughrue Mion, PLLC
  • Priority: JP2010-200433 20100908
  • International Application: PCT/JP2011/069099 WO 20110818
  • International Announcement: WO2012/032937 WO 20120315
  • Main IPC: H03K19/173
  • IPC: H03K19/173 H03K19/177
Reconfigurable circuit
Abstract:
A reconfigurable circuit of the present invention is characterized in being provided with: a first programmable wiring group, which is disposed in the first direction; a second programmable wiring group, which is disposed in the second direction that intersects the first direction; a first switch element array, which connects the programmable wiring groups to each other at the intersecting points of the first programmable wiring group and the branch line group of a functional block input wiring group or at the intersecting points of the branch line group of the first programmable wiring group and the functional block input wiring group; a second switch element array, which connects the programmable wiring groups to each other at the intersecting points of the first programmable wiring group and functional block output wiring; and a third switch element array, which connects the programmable wiring groups to each other at the intersecting points of the second programmable wiring group and the first programmable wiring group. The reconfigurable circuit is also characterized in being provided with a fourth switch element array, which connects the programmable wiring groups to each other at the intersecting points of the second programmable wiring group and the functional block input wiring group, and/or a fifth switch element array, which connects the programmable wiring groups to each other at the intersecting points of the second programmable wiring group and the branch lines of the functional block output wiring.
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