Invention Grant
US08879328B2 Sense amplifier column redundancy 有权
感应放大器列冗余

Sense amplifier column redundancy
Abstract:
A memory includes a redundant sense amplifier and a plurality of sense amplifier pairs. Each sense amplifier pair includes a first sense amplifier and a second sense amplifier. Each sense amplifier pair drives a common load line. The memory is configured to implement column redundancy using a single redundant sense amplifier without requiring local read lines for each sense amplifier.
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