A semiconductor memory device includes a memory cell block including memory cells, a random value generation circuit configured to generate random value data using a page address and a column address, a page buffer section connected to bit lines of the memory cell block and configured to store input data inputted in response to the column address and the random value data, and a controller configured to control the page buffer section to generate random data by performing a logic operation on the input data and the random value data stored in the page buffer section.