Invention Grant
- Patent Title: Low power scan flip-flop cell
- Patent Title (中): 低功耗扫描触发器单元
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Application No.: US13682749Application Date: 2012-11-21
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Publication No.: US08880965B2Publication Date: 2014-11-04
- Inventor: Wanggen Zhang , Sian Lu , Shayan Zhang
- Applicant: Wanggen Zhang , Sian Lu , Shayan Zhang
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Priority: CN201210401167 20120806
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A low power scan flip-flop cell includes a multiplexer, a master latch, a scan slave latch and a data slave latch. The master latch is connected to the multiplexer, and used for generating a first latch signal. The scan slave latch is connected to the master latch, and generates a scan output (SO) signal. The data slave latch is connected to the master latch, and generates a Q output depending on a scan enable (SE) input signal and the first latch signal. The Q output is maintained at a predetermined level during scan mode, which eliminates unnecessary switching of combinational logic connected to the scan flip-flop cell and thus reduces power consumption.
Public/Granted literature
- US20140040688A1 LOW POWER SCAN FLIP-FLOP CELL Public/Granted day:2014-02-06
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