Invention Grant
- Patent Title: Structural analyser
- Patent Title (中): 结构分析仪
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Application No.: US12723489Application Date: 2010-03-12
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Publication No.: US08881117B2Publication Date: 2014-11-04
- Inventor: Andrew Stanford-Jason
- Applicant: Andrew Stanford-Jason
- Applicant Address: GB London
- Assignee: XMOS Ltd.
- Current Assignee: XMOS Ltd.
- Current Assignee Address: GB London
- Agency: Sughrue Mion, PLLC
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F9/45 ; G06F11/36

Abstract:
A method and corresponding tool, the method comprising: generating a lower-level control flow structure representing a portion of an executable program, the lower-level control flow structure comprising a plurality of lower-level nodes representing operations occurring within the program and a plurality of directional edges representing program flow between nodes; generating a higher-level control flow structure by matching a plurality of the lower-level nodes and edges to higher-level structure nodes representing internal structure, each higher-level structure node representing a group of one or more lower-level nodes and one or more associated edges; and using the higher-level control flow structure to estimate a timing property relating to execution of the program on a processor. The higher-level structure nodes are selected exclusively from a predetermined set of structure node patterns, each pattern in the set having at most one entry point and at most one exit point.
Public/Granted literature
- US20110225571A1 STRUCTURAL ANALYSER Public/Granted day:2011-09-15
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