Invention Grant
- Patent Title: Nanopillar field-effect and junction transistors
- Patent Title (中): 纳米柱场效应和结晶体管
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Application No.: US13941240Application Date: 2013-07-12
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Publication No.: US08883645B2Publication Date: 2014-11-11
- Inventor: Chieh-Feng Chang , Aditya Rajagopal , Axel Scherer
- Applicant: California Institute of Technology
- Applicant Address: US CA Pasadena
- Assignee: California Institute of Technology
- Current Assignee: California Institute of Technology
- Current Assignee Address: US CA Pasadena
- Agency: Steinfl & Bruno, LLP
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L29/66 ; H01L29/423 ; H01L29/06

Abstract:
Methods for fabrication of nanopillar field effect transistors are described. These transistors can have high height-to-width aspect ratios and be CMOS compatible. Silicon nitride may be used as a masking material. These transistors have a variety of applications, for example they can be used for molecular sensing if the nanopillar has a functionalized layer contacted to the gate electrode. The functional layer can bind molecules, causing an electrical signal in the transistor.
Public/Granted literature
- US20140134819A1 NANOPILLAR FIELD-EFFECT AND JUNCTION TRANSISTORS Public/Granted day:2014-05-15
Information query
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