Invention Grant
- Patent Title: Programming a split gate bit cell
- Patent Title (中): 编程分裂门位单元
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Application No.: US13751548Application Date: 2013-01-28
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Publication No.: US08885403B2Publication Date: 2014-11-11
- Inventor: Cheong M. Hong , Ronald J. Syzdek , Brian A. Winstead
- Applicant: Cheong M. Hong , Ronald J. Syzdek , Brian A. Winstead
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Joanna G. Chiu; James L. Clingan, Jr.
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C11/40

Abstract:
A method of programming a split gate memory applies voltages differently to the terminals of the selected cells and the deselected cells. For cells being programming by being coupled to a selected row and a selected column, coupling the control gate to a first voltage, coupling the select gate to a second voltage, programming is achieved by coupling the drain terminal to a current sink that causes the split gate memory cell to be conductive, and coupling the source terminal to a third voltage. For cells not being programmed by not being coupled to a selected row, non-programming is maintained by coupling the control gate to the first voltage, coupling the select gate to a fourth voltage which is greater than a voltage applied to the select gate during a read in which the split gate memory cells are deselected but sufficiently low to prevent programming.
Public/Granted literature
- US20140211559A1 PROGRAMMING A SPLIT GATE BIT CELL Public/Granted day:2014-07-31
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