Invention Grant
- Patent Title: Memory device
- Patent Title (中): 内存设备
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Application No.: US13021243Application Date: 2011-02-04
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Publication No.: US08886989B2Publication Date: 2014-11-11
- Inventor: Masaru Ogawa , Tarou Iwashiro
- Applicant: Masaru Ogawa , Tarou Iwashiro
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-121959 20100527
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F12/02 ; G06F11/10

Abstract:
According to one embodiment, a memory device includes a semiconductor memory and a controller that controls the semiconductor memory. The controller includes a first command issuing module, second command issuing module, error correction module and control module. The first command issuing module is configured to issue a read command to the semiconductor memory. The second command issuing module is configured to issue a first command instructing a process that does not involve reading data from the semiconductor memory independently from the first command issuing module to the semiconductor memory. The error correction module is configured to correct an error contained in data supplied from the semiconductor memory. The control module is configured to control the error correction module, first command issuing module and second command issuing module.
Public/Granted literature
- US20110296235A1 MEMORY DEVICE Public/Granted day:2011-12-01
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