Invention Grant
US08892935B2 Dynamic bus clock rate adjusting method and device 有权
动态总线时钟速率调整方法及装置

Dynamic bus clock rate adjusting method and device
Abstract:
A dynamic bus clock rate adjusting method is to be executed by a bus controller and a CPU. The bus controller is coupled with a bus that is coupled with a plurality of slave devices. The method comprises the steps of: configuring the bus controller to generate, upon receipt of a request signal from one of the slave devices, an access instruction including an address from which the request signal is sent; and configuring the CPU to determine which of the slave devices the address of the access instruction corresponds so as to obtain a working clock rate thereof, and to set the bus controller to adjust an operating clock rate of the bus according to the working clock rate, and to perform the access instruction on the slave device via the bus.
Public/Granted literature
Information query
Patent Agency Ranking
0/0