Invention Grant
- Patent Title: Semiconductor device with parasitic bipolar transistor
- Patent Title (中): 具有寄生双极晶体管的半导体器件
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Application No.: US13229079Application Date: 2011-09-09
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Publication No.: US08896108B2Publication Date: 2014-11-25
- Inventor: Yuichi Watanabe , Akira Yamane , Yasuo Oishibashi
- Applicant: Yuichi Watanabe , Akira Yamane , Yasuo Oishibashi
- Applicant Address: US AZ Phoenix
- Assignee: Semiconductor Components Industries, LLC
- Current Assignee: Semiconductor Components Industries, LLC
- Current Assignee Address: US AZ Phoenix
- Agent Rennie William Dover
- Priority: JP2010-208814 20100917
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L27/02 ; H01L23/00

Abstract:
The invention enhances resistance to a surge in a semiconductor device having a semiconductor die mounted on a lead frame. An N type embedded layer, an epitaxial layer and a P type semiconductor layer are disposed on the front surface of a P type semiconductor substrate forming an IC die. A metal thin film is disposed on the back surface of the semiconductor substrate, and a conductive paste containing silver particles and so on is disposed between the metal thin film and a metal island. When a surge is applied to a pad electrode disposed on the front surface of the semiconductor layer, the surge current flowing from the semiconductor layer into the semiconductor substrate runs toward the metal island through the metal thin film.
Public/Granted literature
- US20120068321A1 SEMICONDUCTOR DEVICE Public/Granted day:2012-03-22
Information query
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