Invention Grant
- Patent Title: Multi-core engine for detecting bit errors
- Patent Title (中): 用于检测位错误的多核引擎
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Application No.: US11741016Application Date: 2007-04-27
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Publication No.: US08898536B2Publication Date: 2014-11-25
- Inventor: Christoph Kogelnik
- Applicant: Christoph Kogelnik
- Applicant Address: US CA Sunnyvale
- Assignee: NetApp, Inc.
- Current Assignee: NetApp, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Cesari and McKenna, LLP
- Main IPC: H03M13/00
- IPC: H03M13/00 ; G06F21/60 ; G06F11/10 ; H04L29/06 ; H03M13/09

Abstract:
The following description includes a method and a system of detecting bit errors in a multi-core processor. When a subatomic particle, or other matter, impacts the processing cores of the processor, bit flips may occur. To detect these bit flips and thereby prevent erroneous results, operations performed by one core are inversely performed by another core. By comparing the results of the original operation and the inverse operation, embodiments of the invention can detect errors in binary data. If an error is detected, then the operations are performed again. Alternatively, multiple cores do not perform inverse operations, but instead perform identical operations in parallel. The results from the parallel operations are compared and if the results are not identical, then the operations are repeated.
Public/Granted literature
- US20090327818A1 MULTI-CORE ENGINE FOR DETECTING BIT ERRORS Public/Granted day:2009-12-31
Information query
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