Invention Grant
- Patent Title: Semiconductor device and method of forming conductive layer over metal substrate for electrical interconnect of semiconductor die
- Patent Title (中): 在半导体管芯的电气互连的金属基板上形成导电层的半导体器件和方法
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Application No.: US13425349Application Date: 2012-03-20
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Publication No.: US08901755B2Publication Date: 2014-12-02
- Inventor: HeeJo Chi , Namju Cho , HanGil Shin
- Applicant: HeeJo Chi , Namju Cho , HanGil Shin
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/28
- IPC: H01L23/28 ; H01L21/00

Abstract:
A semiconductor device has a substrate with a cavity. A conductive layer is formed within the cavity and over the substrate outside the cavity. A plurality of indentations can be formed in a surface of the substrate opposite the cavity for stress relief. A first semiconductor die is mounted within the cavity. A plurality of conductive vias can be formed through the first semiconductor die. An insulating layer is disposed between the first semiconductor die and substrate with the first conductive layer embedded within the first insulating layer. An encapsulant is deposited over the first semiconductor die and substrate. An interconnect structure is formed over the encapsulant. The interconnect structure is electrically connected to the first semiconductor die and first conductive layer. The substrate is removed to expose the first conductive layer. A second semiconductor die is mounted to the conductive layer over the first semiconductor die.
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