Invention Grant
- Patent Title: Digital PLL with dynamic loop gain control
- Patent Title (中): 具有动态环路增益控制的数字PLL
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Application No.: US13960073Application Date: 2013-08-06
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Publication No.: US08901975B2Publication Date: 2014-12-02
- Inventor: Reza Navid
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Main IPC: H03L7/06
- IPC: H03L7/06 ; G11C7/22 ; H03L7/14 ; H03L7/093 ; H03L7/089

Abstract:
The disclosed embodiments relate to a digital phase-locked loop (PLL) with dynamic gain control. This digital PLL includes a phase detector which receives a reference signal and a feedback signal as inputs and produces an output signal comprising up/down values. It also includes a digital loop filter which receives the phase-detector output signal as an input and produces an M-bit output signal. This digital loop filter is associated with a loop-parameter control unit (LPCU) which dynamically generates loop-filter parameters for the digital loop filter based on an observed pattern of up/down values from the phase-detector output over a specified period of time. A digitally controlled oscillator (DCO) receives the loop-filter output signal and produces a PLL output signal. Finally, a feedback path returns the PLL output signal to the phase detector.
Public/Granted literature
- US20140062549A1 DIGITAL PLL WITH DYNAMIC LOOP GAIN CONTROL Public/Granted day:2014-03-06
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