Invention Grant
- Patent Title: Semiconductor memory device comprising inverting amplifier circuit and driving method thereof
- Patent Title (中): 半导体存储器件包括反相放大器电路及其驱动方法
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Application No.: US13288089Application Date: 2011-11-03
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Publication No.: US08902637B2Publication Date: 2014-12-02
- Inventor: Yasuhiko Takemura
- Applicant: Yasuhiko Takemura
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2010-249435 20101108
- Main IPC: G11C11/24
- IPC: G11C11/24 ; G11C16/02 ; G11C11/404 ; G11C11/405

Abstract:
A novel semiconductor memory device whose power consumption is low is provided. A source of a writing transistor WTr_n_m, a gate of a reading transistor RTr_n_m, and one electrode of a capacitor CS_n_m are connected to each other. A gate and a drain of the writing transistor WTr_n_m are connected to a writing word line WWL_n and a writing bit line WBL_m, respectively. The other electrode of the capacitor CS_n_m is connected to a reading word line RWL_n. A drain of the reading transistor RTr_n_m is connected to a reading bit line RBL_m. Here, the potential of the reading bit line RBL_m is input to an inverting amplifier circuit such as a flip-flop circuit FF_m to be inverted by the inverting amplifier circuit. This inverted potential is output to the writing bit line WBL_m.
Public/Granted literature
- US20120113707A1 SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD OF SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-05-10
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