Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13420767Application Date: 2012-03-15
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Publication No.: US08902654B2Publication Date: 2014-12-02
- Inventor: Hiroshi Maejima , Koji Hosono
- Applicant: Hiroshi Maejima , Koji Hosono
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-133942 20110616
- Main IPC: G11C16/08
- IPC: G11C16/08 ; G11C16/10 ; G11C16/04

Abstract:
In a writing operation, a control circuit raises the voltage of a writing-prohibited bit line among a plurality of bit lines to a first voltage, and thereafter brings the writing-prohibited bit line into a floating state. Then, the control circuit raises the voltage of a writing bit line other than the writing-prohibited bit line to a second voltage. In this way, the control circuit prohibits writing into a memory transistor corresponding to the writing-prohibited bit line. On the other hand, the control circuit executes writing into a memory transistor corresponding to the writing bit line.
Public/Granted literature
- US20120320677A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-12-20
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