Invention Grant
US08902956B2 On-package input/output clustered interface having full and half-duplex modes
有权
集成式输入/输出集群接口,具有全双工和半双工模式
- Patent Title: On-package input/output clustered interface having full and half-duplex modes
- Patent Title (中): 集成式输入/输出集群接口,具有全双工和半双工模式
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Application No.: US13995015Application Date: 2011-12-22
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Publication No.: US08902956B2Publication Date: 2014-12-02
- Inventor: Thomas P. Thomas , Stanley S. Kulick , Randy B. Osborne
- Applicant: Thomas P. Thomas , Stanley S. Kulick , Randy B. Osborne
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- International Application: PCT/US2011/066981 WO 20111222
- International Announcement: WO2013/095542 WO 20130627
- Main IPC: H04B1/38
- IPC: H04B1/38 ; H04B3/02 ; G06F15/78 ; G06F13/40 ; H03K19/0175

Abstract:
An apparatus and system for controlling traffic on an on-chip network. Embodiments of the apparatus comprise single-ended transmission circuitry and single-ended receiving circuitry on a first chip for coupling with a second chip, the transmission circuitry having impedance matching and lacking equalization, the receiving circuitry lacking equalization, the transmission circuitry and the receiving circuitry having statically configurable features and organized in clusters, wherein the clusters have the same physical layer circuitry design for different configurations of the configurable features, the configurable features including half-duplex mode and full-duplex mode, wherein the first chip and the second chip are on the same package, and wherein a plurality of conductive lines for coupling the first chip with the second chip are matched.
Public/Granted literature
- US20130322556A1 ON-PACKAGE INPUT/OUTPUT CLUSTERED INTERFACE HAVING FULL AND HALF-DUPLEX MODES Public/Granted day:2013-12-05
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