Invention Grant
- Patent Title: Coverage-based bug clustering
- Patent Title (中): 基于覆盖的错误聚类
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Application No.: US13115767Application Date: 2011-05-25
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Publication No.: US08903823B1Publication Date: 2014-12-02
- Inventor: Reshef Meir , Ohad Givaty , Yael Kinderman
- Applicant: Reshef Meir , Ohad Givaty , Yael Kinderman
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Holland & Knight LLP
- Agent Mark H. Whittenberger, Esq.
- Main IPC: G06F17/30
- IPC: G06F17/30 ; G06F7/00

Abstract:
Embodiments provide tools and techniques for clustering failing runs in a design verification environment to aid in determining causes of the failing runs. Embodiments may include determining multiple failing runs of the design verification environment. Multiple partitions of the multiple failing runs may be generated. Each respective partition may partition one or more subsets of the multiple failing runs into one or more non-overlapping clusters of failing runs. The multiple partitions of the subsets of multiple failing runs may be merged into a hierarchical structure that includes at least one of the clusters. One or more clusters of failing runs from the merged hierarchical structure may be selected; these may be referred to as core clusters. Core clusters may be presented to a user based on the size and distance between the clusters.
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