Invention Grant
- Patent Title: Cache self-testing technique to reduce cache test time
- Patent Title (中): 缓存自检技术，减少缓存测试时间
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Application No.: US13562208Application Date: 2012-07-30
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Publication No.: US08904227B2Publication Date: 2014-12-02
- Inventor: Narendra Chakravarthy Nandam , Donald B. Kay
- Applicant: Narendra Chakravarthy Nandam , Donald B. Kay
- Applicant Address: US CA Redwood City
- Assignee: Oracle International Corporation
- Current Assignee: Oracle International Corporation
- Current Assignee Address: US CA Redwood City
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Robert C. Kowert
- Main IPC: G06F11/00
- IPC: G06F11/00
Abstract:
A method for identifying, based on instructions stored externally to a processor containing a cache memory, a functional portion of the cache memory, then loading cache test code into the functional portion of the cache memory from an external source, and executing the cache test code stored in the cache memory to test the cache memory on a cache-line-granular basis and store fault information.
Public/Granted literature
- US20140032968A1 CACHE SELF-TESTING TECHNIQUE TO REDUCE CACHE TEST TIME Public/Granted day:2014-01-30
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