Invention Grant
- Patent Title: Electronic apparatus
- Patent Title (中): 电子仪器
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Application No.: US13522551Application Date: 2011-02-09
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Publication No.: US08904233B2Publication Date: 2014-12-02
- Inventor: Hidefumi Ibe , Tadanobu Toba , Kenichi Shimbo , Hitoshi Taniguchi
- Applicant: Hidefumi Ibe , Tadanobu Toba , Kenichi Shimbo , Hitoshi Taniguchi
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Antonelli, Terry, Stout & Kraus LLP.
- Priority: JP2010-033654 20100218
- International Application: PCT/JP2011/052704 WO 20110209
- International Announcement: WO2011/102270 WO 20110825
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/14 ; G01R31/00

Abstract:
A failure caused by a soft-error including MNU, of an electronic apparatus is prevented, while suppressing increase of a mounting area, power consumption, and processing time. The electronic apparatus stores data indicating the state of a flip-flop included in a sequential logic circuit within an arithmetic unit, each time when execution is performed on a check point provided for every predetermined number of instructions. When a symptom of a soft-error is detected, the apparatus sets the state of the flip-flop included in the sequential logic circuit within the arithmetic unit, based on the data stored after execution of the instruction at the immediately preceding check point, and restarts execution from the next instruction, being subsequent to the instruction associated with the immediately preceding check point.
Public/Granted literature
- US20120304005A1 ELECTRONIC APPARATUS Public/Granted day:2012-11-29
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