Invention Grant
US08904249B2 At speed testing of high performance memories with a multi-port BIS engine
有权
在使用多端口BIS引擎的高性能存储器进行速度测试时
- Patent Title: At speed testing of high performance memories with a multi-port BIS engine
- Patent Title (中): 在使用多端口BIS引擎的高性能存储器进行速度测试时
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Application No.: US13447193Application Date: 2012-04-14
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Publication No.: US08904249B2Publication Date: 2014-12-02
- Inventor: Raguram Damodaran , Naveen Bhoria
- Applicant: Raguram Damodaran , Naveen Bhoria
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; Frederick J. Telecky, Jr.
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
A programmable Built In Self Test (BIST) system used to test embedded memories where the memories may be operating at a clock frequency higher than the operating frequency of the BIST. A plurality of BIST memory ports are used to generate multiple memory test instructions in parallel, and the parallel instructions are then merged to generate a single memory test instruction stream at a speed that is a multiple of the BIST operating frequency.
Public/Granted literature
- US20130275822A1 At Speed Testing of High Performance Memories with a Multi-Port BIS Engine Public/Granted day:2013-10-17
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