Invention Grant
- Patent Title: Multi-standard viterbi processor
- Patent Title (中): 多标准维特比处理器
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Application No.: US12853589Application Date: 2010-08-10
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Publication No.: US08904266B2Publication Date: 2014-12-02
- Inventor: Weihua Tang , Nur Engin , Frits Anthonie Steenhof , Marc Klaassen , Andries Pieter Hekstra , Sergie Valerjewitsch Sawitzki
- Applicant: Weihua Tang , Nur Engin , Frits Anthonie Steenhof , Marc Klaassen , Andries Pieter Hekstra , Sergie Valerjewitsch Sawitzki
- Applicant Address: NL Eindhoven
- Assignee: NXP, B.V.
- Current Assignee: NXP, B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H03M13/17
- IPC: H03M13/17 ; H03M13/00 ; H03M13/41

Abstract:
Various embodiments relate to a multi-standard Viterbi decoder. Based on programmable values for constraint length, generator polynomials, and code rate, the multi-standard Viterbi decoder may adhere to a specific convolutional code standard. At a given time, the multi-standard Viterbi decoder may receive a variety of convolutional codes through a channel and may process them using various forms of the trace back method. Various embodiments include a branch metric unit and path metric unit that include a variety of sub-units that may or may not be active based on the value of the programmable value. Various embodiments also enable the multi-standard Viterbi decoder to handle different forms of convolutional codes, such as tail-biting codes. In some embodiments, the multi-standard Viterbi decoder may also process at least two convolutional codes concurrently.
Public/Granted literature
- US20120042229A1 MULTI-STANDARD VITERBI PROCESSOR Public/Granted day:2012-02-16
Information query
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