Invention Grant
- Patent Title: Semiconductor device including an electrode lower layer and an electrode upper layer and method of manufacturing semiconductor device
- Patent Title (中): 包括电极下层和电极上层的半导体器件和半导体器件的制造方法
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Application No.: US12585831Application Date: 2009-09-25
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Publication No.: US08907389B2Publication Date: 2014-12-09
- Inventor: Yuichi Nakao
- Applicant: Yuichi Nakao
- Applicant Address: JP Kyoto
- Assignee: Rohm Co., Ltd.
- Current Assignee: Rohm Co., Ltd.
- Current Assignee Address: JP Kyoto
- Agency: Rabin & Berdo, P.C.
- Priority: JP2008-248901 20080926
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L49/02
Abstract:
The semiconductor device according to the present invention includes a ferroelectric film and an electrode stacked on the ferroelectric film. The electrode has a multilayer structure of an electrode lower layer in contact with the ferroelectric film and an electrode upper layer stacked on the electrode lower layer. The electrode upper layer is made of a conductive material having an etching selection ratio with respect to the materials for the ferroelectric film and the electrode lower layer. The upper surface of the electrode upper layer is planarized.
Public/Granted literature
- US20100078693A1 Semiconductor device and method of manufacturing semiconductor device Public/Granted day:2010-04-01
Information query
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