Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US12191661Application Date: 2008-08-14
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Publication No.: US08907443B2Publication Date: 2014-12-09
- Inventor: Hiroaki Takasu
- Applicant: Hiroaki Takasu
- Applicant Address: JP Chiba
- Assignee: Seiko Instruments Inc.
- Current Assignee: Seiko Instruments Inc.
- Current Assignee Address: JP Chiba
- Agency: Brinks Gilson & Lione
- Priority: JP2007-215947 20070822
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L27/02 ; H01L29/78 ; H01L29/66

Abstract:
In order to suppress an off leak current of an off transistor for ESD protection, in an NMOS for ESD protection whose isolation region has a shallow trench structure, a drain region is placed apart from the shallow trench isolation region so as not to be in direct contact with the shallow trench isolation region in a region where the drain region of the NMOS transistor for ESD protection is adjacent to at least a gate electrode of the NMOS transistor for ESD protection.
Public/Granted literature
- US20090050966A1 SEMICONDUCTOR DEVICE Public/Granted day:2009-02-26
Information query
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