Invention Grant
US08907503B2 Manufacturing an underfill in a semiconductor chip package 有权
在半导体芯片封装中制造底层填料

Manufacturing an underfill in a semiconductor chip package
Abstract:
A method for manufacturing an underfill in a semiconductor chip stack having a cavity between a first surface and a second surface includes providing at least one access hole in one of the first or second surface; providing at least one vent hole in the one of the first or second surfaces; and applying a viscous filling material through the at least one access hole into the cavity thereby squeezing out air or gas through the at least one vent hole.
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