Invention Grant
- Patent Title: Circuit and method for reducing leakage current
- Patent Title (中): 减少漏电流的电路及方法
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Application No.: US14012844Application Date: 2013-08-28
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Publication No.: US08908459B2Publication Date: 2014-12-09
- Inventor: Dariusz Kowalczyk
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: G11C7/02
- IPC: G11C7/02 ; G11C11/4074 ; G11C7/10 ; H03K17/693 ; G11C11/4091 ; G11C11/4096 ; G11C7/00 ; G11C11/4094

Abstract:
A circuit includes an input/output (IO) circuit, a first node configured to have a first voltage level, a second node configured to have a second voltage level, a third node, and a switching circuit. The IO circuit has a set of transistors, and the third node is coupled to bulks of the set of transistors. The switching circuit is configured to couple the first node to the third node when the IO circuit is operated in an active mode; and couple the second node to the third node when the IO circuit is operated in an inactive mode. The first voltage level causes the set of transistors to have a first threshold voltage, the second voltage level causes the set of transistors to have a second threshold voltage, and an absolute value of the second threshold voltage is greater than that of the first threshold voltage.
Public/Granted literature
- US20130343138A1 CIRCUIT AND METHOD FOR REDUCING LEAKAGE CURRENT Public/Granted day:2013-12-26
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