Invention Grant
- Patent Title: Pipeline architecture for scalable performance on memory
- Patent Title (中): 管道架构，可在内存上实现可扩展的性能
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Application No.: US12946612Application Date: 2010-11-15
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Publication No.: US08909849B2Publication Date: 2014-12-09
- Inventor: Rajesh Sundaram , Derchang Kau , David J. Zimmerman
- Applicant: Rajesh Sundaram , Derchang Kau , David J. Zimmerman
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G11C13/00
- IPC: G11C13/00 ; G11C7/10
Abstract:
An apparatus for data storage is presented. In one embodiment, the apparatus includes a phase change memory device comprising phase change memory storage elements. The apparatus further includes control logic to control two or more set pipelines to serve memory requests in a staggered manner, such that set operations of the memory requests begin at different times.
Public/Granted literature
- US20120120722A1 PIPELINE ARCHITECTURE FOR SCALABLE PERFORMANCE ON MEMORY Public/Granted day:2012-05-17
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