Invention Grant
- Patent Title: System and method for manipulating security of integrated circuit layout
- Patent Title (中): 操纵集成电路布局安全的系统和方法
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Application No.: US13461052Application Date: 2012-05-01
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Publication No.: US08910303B2Publication Date: 2014-12-09
- Inventor: Yi-Jen Su , Ying-Sung Huang
- Applicant: Yi-Jen Su , Ying-Sung Huang
- Applicant Address: TW Hsinchu
- Assignee: Anaglobe Technology, Inc.
- Current Assignee: Anaglobe Technology, Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F21/51 ; G06F21/76
Abstract:
A method for manipulating security of an integrated circuit layout, comprising: rendering a PCell that is created by an original user for a successive user; providing an open access to the PCell; providing a PCell evaluator to execute evaluating steps of: getting license information from the PCell, and checking the PCell license information; and generating a layout of a sub-master by instantiating a super-master of the PCell if the PCell license information is valid, or leave the sub-master empty in a PCell view if the PCell license information is invalid.
Public/Granted literature
- US20130298262A1 System and Method for Manipulating Security of Integrated Circuit Layout Public/Granted day:2013-11-07
Information query
