Invention Grant
- Patent Title: Resistive switching memory
- Patent Title (中): 电阻式开关存储器
-
Application No.: US13625518Application Date: 2012-09-24
-
Publication No.: US08912517B2Publication Date: 2014-12-16
- Inventor: Michael A. Van Buskirk
- Applicant: Adesto Technologies Corporation
- Applicant Address: US CA Sunnyvale
- Assignee: Adesto Technologies Corporation
- Current Assignee: Adesto Technologies Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/02
- IPC: H01L29/02

Abstract:
In one embodiment of the present invention, a memory cell includes a first resistive switching element having a first terminal and a second terminal, and a second resistive switching element having a first terminal and a second terminal. The memory further includes a three terminal transistor, which has a first terminal, a second terminal, and a third terminal. The first terminal of the three terminal transistor is coupled to the first terminal of the first resistive switching element. The second terminal of the three terminal transistor is coupled to the first terminal of the second resistive switching element. The third terminal of the three terminal transistor is coupled to a word line.
Public/Granted literature
- US20140084232A1 Resistive Switching Memory Public/Granted day:2014-03-27
Information query
IPC分类: