Invention Grant
- Patent Title: Packaging substrate and fabrication method thereof
- Patent Title (中): 包装基板及其制造方法
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Application No.: US13542914Application Date: 2012-07-06
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Publication No.: US08912642B2Publication Date: 2014-12-16
- Inventor: Tzyy-Jang Tseng , Chung-W. Ho
- Applicant: Tzyy-Jang Tseng , Chung-W. Ho
- Applicant Address: TW Taoyuan
- Assignee: Unimicron Technology Corporation
- Current Assignee: Unimicron Technology Corporation
- Current Assignee Address: TW Taoyuan
- Agency: Edwards Wildman Palmer LLP
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW100124361A 20110708
- Main IPC: H01L33/44
- IPC: H01L33/44 ; H01L23/498 ; H01L23/00

Abstract:
A packaging substrate includes a first dielectric layer, a first circuit layer, a first metal bump, and a built-up structure. The first metal bump and the first circuit layer are embedded in and exposed from two surfaces of the first dielectric layer. The end of the first metal bump is embedded in the first circuit layer and between the first circuit layer and the first dielectric layer. In addition, a conductive seedlayer is disposed between the first circuit layer and the first metal bump. The built-up structure is disposed on the first circuit layer and the first dielectric layer. The outmost layer of the built-up structure has a plurality of conductive pads. Compared to the prior art, the present invention can effectively improve the warpage problem of the conventional packaging substrate.
Public/Granted literature
- US20130009306A1 PACKAGING SUBSTRATE AND FABRICATION METHOD THEREOF Public/Granted day:2013-01-10
Information query
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