Invention Grant
US08924902B2 Methods and circuits for optimizing performance and power consumption in a design and circuit employing lower threshold voltage (LVT) devices 有权
用于在采用较低阈值电压(LVT)器件的设计和电路中优化性能和功耗的方法和电路

  • Patent Title: Methods and circuits for optimizing performance and power consumption in a design and circuit employing lower threshold voltage (LVT) devices
  • Patent Title (中): 用于在采用较低阈值电压(LVT)器件的设计和电路中优化性能和功耗的方法和电路
  • Application No.: US12683075
    Application Date: 2010-01-06
  • Publication No.: US08924902B2
    Publication Date: 2014-12-30
  • Inventor: Lew G. Chua-Eoan
  • Applicant: Lew G. Chua-Eoan
  • Applicant Address: US CA San Diego
  • Assignee: QUALCOMM Incorporated
  • Current Assignee: QUALCOMM Incorporated
  • Current Assignee Address: US CA San Diego
  • Agent Peter Michael Kamarchik; Nicholas J. Pauley; Joseph Agusta
  • Main IPC: G06F17/50
  • IPC: G06F17/50
Methods and circuits for optimizing performance and power consumption in a design and circuit employing lower threshold voltage (LVT) devices
Abstract:
Methods and circuits for optimizing performance and power consumption in a circuit design and circuit employing one or more lower threshold voltage (Lvt) cells or devices are described. A base supply voltage amplitude is determined for providing operating power for the circuit. The base supply voltage amplitude is a low or lowest voltage level that still satisfies a performance specification for the circuit. Providing a low or lowest base supply voltage level reduces or minimizes the standby (i.e., non-switching) power consumption in the Lvt device(s) since current leakage is reduced as the supply voltage level is reduced. Reducing the supply voltage level used to power the Lvt device(s) also reduces active power consumption for the circuit as well. Thus, total power consumption is optimized or reduced while still receiving the benefit of using Lvt devices to optimize or increase performance of a circuit layout and circuit.
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