Invention Grant
US08927357B2 Junction field-effect transistor with raised source and drain regions formed by selective epitaxy 有权
通过选择性外延形成的具有升高的源极和漏极区的结场场效应晶体管

Junction field-effect transistor with raised source and drain regions formed by selective epitaxy
Abstract:
Junction field-effect transistors, methods for fabricating junction field-effect transistors, and design structures for a junction field-effect transistor. A source and a drain of the junction field-effect transistor are comprised of a semiconductor material grown by selective epitaxy and in direct contact with a top surface of a semiconductor layer. A gate is formed that is aligned with a channel laterally disposed in the semiconductor layer between the source and the drain. The source, the drain, and the semiconductor layer are each comprised of a second semiconductor material having an opposite conductivity type from a first semiconductor material comprising the gate.
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