Invention Grant
- Patent Title: Integrating channel SiGe into pFET structures
- Patent Title (中): 将沟道SiGe集成到pFET结构中
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Application No.: US13896968Application Date: 2013-05-17
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Publication No.: US08927363B2Publication Date: 2015-01-06
- Inventor: Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Alexander Reznicek
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Otterstedt, Ellenbogen & Kammer, LLP
- Agent Daniel P. Morris, Esq.
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/12

Abstract:
A structure including nFET and pFET devices is fabricated by depositing a germanium-containing layer on a crystalline silicon layer. The crystalline silicon layer is converted to silicon germanium in the pFET region to provide a thin silicon germanium channel for the pFET device fabricated thereon. Silicon trench isolation is provided subsequent to deposition of the germanium-containing layer. There is substantially no thickness variation in the silicon germanium layer across the pFET device width. Electrical degradation near the shallow trench isolation region bounding the pFET device is accordingly avoided. Shallow trench isolation may be provided prior to or after conversion of the silicon layer to silicon germanium in the pFET region. The germanium-containing layer is removed from the nFET region so that an nFET device can be formed on the crystalline silicon layer.
Public/Granted literature
- US20140339638A1 INTEGRATING CHANNEL SIGE INTO PFET STRUCTURES Public/Granted day:2014-11-20
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