Invention Grant
- Patent Title: Looped interconnect structure
- Patent Title (中): 环形互连结构
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Application No.: US13570089Application Date: 2012-08-08
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Publication No.: US08927877B2Publication Date: 2015-01-06
- Inventor: Hsin-An Shen , Yung Ching Chen , Ming-Chung Sung , Chih-Hang Tung , Chien-Hsun Lee , Da-Yuan Shih
- Applicant: Hsin-An Shen , Yung Ching Chen , Ming-Chung Sung , Chih-Hang Tung , Chien-Hsun Lee , Da-Yuan Shih
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K3/30

Abstract:
Disclosed herein is a system and method for mounting packages by forming one or more wire loop interconnects, optionally, with a wirebonder, and mounting the interconnects to a mounting pad on a first substrate. A first and second stud ball may each have at least one flat surface be disposed on a single mounting pad, and a wire having a bend region and forming a loop may be disposed between the stud balls. The stud balls may be formed from a deformed mouthing node formed on a wire. The loop may be mounted on a mounting pad on a first substrate and a second substrate may be mounted on the loop via a conductive material such as solder.
Public/Granted literature
- US20140041918A1 Looped Interconnect Structure Public/Granted day:2014-02-13
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