Invention Grant
- Patent Title: Nitride semiconductor wafer including different lattice constants
- Patent Title (中): 氮化物半导体晶片包括不同的晶格常数
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Application No.: US13405903Application Date: 2012-02-27
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Publication No.: US08928000B2Publication Date: 2015-01-06
- Inventor: Hung Hung , Tomonari Shioda , Jongil Hwang , Naoharu Sugiyama , Shinya Nunoue
- Applicant: Hung Hung , Tomonari Shioda , Jongil Hwang , Naoharu Sugiyama , Shinya Nunoue
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-224367 20111011
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L21/02 ; C30B23/02 ; H01L31/10 ; C30B25/18 ; H01L33/04 ; H01L29/778 ; H01L29/812 ; H01L33/12 ; C30B29/40 ; H01L29/20 ; H01L33/00

Abstract:
According to one embodiment, a nitride semiconductor wafer includes a silicon substrate, a lower strain relaxation layer provided on the silicon substrate, an intermediate layer provided on the lower strain relaxation layer, an upper strain relaxation layer provided on the intermediate layer, and a functional layer provided on the upper strain relaxation layer. The intermediate layer includes a first lower layer, a first doped layer provided on the first lower layer, and a first upper layer provided on the first doped layer. The first doped layer has a lattice constant larger than or equal to that of the first lower layer and contains an impurity of 1×1018 cm−3 or more and less than 1×1021 cm−3. The first upper layer has a lattice constant larger than or equal to that of the first doped layer and larger than that of the first lower layer.
Public/Granted literature
- US08884307B2 Nitride semiconductor wafer including different lattice constants Public/Granted day:2014-11-11
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