Invention Grant
US08928111B2 Transistor with high breakdown voltage having separated drain extensions
有权
具有高击穿电压的晶体管具有分离的漏极延伸
- Patent Title: Transistor with high breakdown voltage having separated drain extensions
- Patent Title (中): 具有高击穿电压的晶体管具有分离的漏极延伸
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Application No.: US13302732Application Date: 2011-11-22
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Publication No.: US08928111B2Publication Date: 2015-01-06
- Inventor: Mike Smith
- Applicant: Mike Smith
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Knobbe, Martens, Olson & Bear LLP
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L29/78 ; H01L29/06 ; H01L29/66 ; H01L21/336 ; H01L21/311 ; H01L29/08

Abstract:
Transistors are formed using pitch multiplication. Each transistor includes a source region and a drain region connected by strips of active area material separated by shallow trench isolation (STI) structures, which are formed by dielectric material filling trenches formed by pitch multiplication. During pitch multiplication, rows of spaced-apart mandrels are formed and spacer material is deposited over the mandrels. The spacer material is etched to define spacers on sidewalls of the mandrels. The mandrels are removed, leaving free-standing spacers. The spacers constitute a mask, through which an underlying substrate is etched to form the trenches and strips of active area material. The trenches are filled to form the STI structures. The substrate is doped, forming source, drain and channel regions. A gate is formed over the channel region. In some embodiments, the STI structures and the strips of material facilitate the formation of transistors having a high breakdown voltage.
Public/Granted literature
- US20120074500A1 METHOD FOR FORMING TRANSISTOR WITH HIGH BREAKDOWN VOLTAGE Public/Granted day:2012-03-29
Information query
IPC分类: