Invention Grant
US08929140B2 Memory system in which a read level is changed based on standing time and at least one of a read, write or erase count
有权
存储器系统,其中读取电平根据持续时间和读取,写入或擦除计数中的至少一个而改变
- Patent Title: Memory system in which a read level is changed based on standing time and at least one of a read, write or erase count
- Patent Title (中): 存储器系统,其中读取电平根据持续时间和读取,写入或擦除计数中的至少一个而改变
-
Application No.: US13462022Application Date: 2012-05-02
-
Publication No.: US08929140B2Publication Date: 2015-01-06
- Inventor: Hiroyuki Nagashima
- Applicant: Hiroyuki Nagashima
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-255314 20091106
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G06F11/10 ; G11C11/56 ; G11C16/26 ; G11C16/34 ; G06F11/34

Abstract:
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.
Public/Granted literature
- US20120268994A1 MEMORY SYSTEM Public/Granted day:2012-10-25
Information query