Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
-
Application No.: US13755419Application Date: 2013-01-31
-
Publication No.: US08929144B2Publication Date: 2015-01-06
- Inventor: Tatsuo Izumi
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2012-025541 20120208
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
According to one embodiment, a control circuit of a memory cell array is configured to write data to a memory cell array by applying a first write pass voltage, which is lower than the program voltage, to a first group of nonselective word lines adjacent to a selective word line. The control circuit is further configured to apply a second write pass voltage, which is higher than the first write pass voltage, to a second group of second nonselective word lines, the second group not including the word lines of the first group.
Public/Granted literature
- US20130201762A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2013-08-08
Information query