Invention Grant
US08930630B2 Cache memory controller and method for replacing a cache block 有权
高速缓存存储器控制器和替换高速缓存块的方法

Cache memory controller and method for replacing a cache block
Abstract:
The present disclosure relates to a cache memory controller for controlling a set-associative cache memory, in which two or more blocks are arranged in the same set, the cache memory controller including a content modification status monitoring unit for monitoring whether some of the blocks arranged in the same set of the cache memory have been modified in contents, and a cache block replacing unit for replacing a block, which has not been modified in contents, if some of the blocks arranged in the same set have been modified in contents.
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