Invention Grant
US08930671B2 Logical address offset in response to detecting a memory formatting operation
有权
响应于检测到存储器格式化操作的逻辑地址偏移
- Patent Title: Logical address offset in response to detecting a memory formatting operation
- Patent Title (中): 响应于检测到存储器格式化操作的逻辑地址偏移
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Application No.: US14184876Application Date: 2014-02-20
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Publication No.: US08930671B2Publication Date: 2015-01-06
- Inventor: Mehdi Asnaashari , William E. Benson
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G06F12/10
- IPC: G06F12/10 ; G06F12/06 ; G06F3/06 ; G06F12/02
Abstract:
The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response to detecting the formatting operation, the method includes inspecting format information on the memory unit, calculating a logical address offset, and applying the offset to a host logical address.
Public/Granted literature
- US20140229660A1 LOGICAL ADDRESS OFFSET Public/Granted day:2014-08-14
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