Invention Grant
US08930863B2 System and method for altering circuit design hierarchy to optimize routing and power distribution using initial RTL-level circuit description netlist 有权
用于改变电路设计层级的系统和方法,以使用初始RTL级电路描述网表优化路由和配电

  • Patent Title: System and method for altering circuit design hierarchy to optimize routing and power distribution using initial RTL-level circuit description netlist
  • Patent Title (中): 用于改变电路设计层级的系统和方法,以使用初始RTL级电路描述网表优化路由和配电
  • Application No.: US13829211
    Application Date: 2013-03-14
  • Publication No.: US08930863B2
    Publication Date: 2015-01-06
  • Inventor: Anshuman NayakSamantak ChakrabartiBrijesh AgrawalNilam Sachan
  • Applicant: Atrenta, Inc.
  • Applicant Address: US CA San Jose
  • Assignee: Atrenta, Inc.
  • Current Assignee: Atrenta, Inc.
  • Current Assignee Address: US CA San Jose
  • Agent Thomas Schneck; Mark Protsik
  • Main IPC: G06F17/50
  • IPC: G06F17/50
System and method for altering circuit design hierarchy to optimize routing and power distribution using initial RTL-level circuit description netlist
Abstract:
Systems and methods are disclosed for modifying the hierarchy of a System-on-Chip and other circuit designs to provide better routing and performance as well as more effective power distribution. A user specifies desired modifications to the design hierarchy and then the system automatically alters the hierarchy by performing group, ungroup, and move operations to efficiently and optimally implement the desired hierarchy modifications. Any modifications to port and signal names are automatically resolved by the system and the resultant RTL matches the function of the input RTL. The user then evaluates the revised hierarchy with regard to power distribution and routing congestion, and further hierarchy modifications are performed if necessary. A widget user interface facility is included to allow user-guided direction of hierarchy modifications in an iterative fashion.
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