Invention Grant
- Patent Title: Creating regional routing blockages in integrated circuit design
- Patent Title (中): 在集成电路设计中创建区域路由阻塞
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Application No.: US14081563Application Date: 2013-11-15
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Publication No.: US08930873B1Publication Date: 2015-01-06
- Inventor: Charles Jay Alpert , Zhuo Li , Gi-Joon Nam , Sven Peyer , Sourav Saha , Chin Ngai Sze , Yaoguang Wei
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Garg Law Firm, PLLC
- Agent Rakesh Garg; William J. Stock
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A region of congestion is detected at a set of layers. The region occupies the same area of each layer in the set. A routing blockage is defined as a tuple corresponding to the region. The tuple includes a set of coordinates to describe an area of the region, a first and a second layer coordinates of a first and a second layer in the set of layers. The routing blockage is applied during an iteration of rough routing. Before an iteration of detailed routing, the routing blockage is removed. Detailed routing is performed using a g-cell in the region. The detailed routing uses a routing capacity saved in the g-cell during the iteration of rough routing due to the routing blockage. A revised IC design is produced where a revised congestion in an area corresponding to the region is reduced.
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