Invention Grant
- Patent Title: Method and system for performing software verification
- Patent Title (中): 执行软件验证的方法和系统
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Application No.: US12336483Application Date: 2008-12-16
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Publication No.: US08930912B2Publication Date: 2015-01-06
- Inventor: Jason Robert Andrews
- Applicant: Jason Robert Andrews
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F17/50 ; G06F11/36

Abstract:
Described is a method, system, and computer program product that provides control of a hardware/software system, and allows deterministic execution of the software under examination. According to one approach, a virtual machine for testing software is used with a tightly synchronized stimulus for the software being tested. A verification tool external to the virtual machine is used to provide test stimulus to and to collect test information from the virtual machine. Test stimulus from the verification tool that is external to the virtual machine provides the stimulation that incrementally operates and changes the state of the virtual machine. The stimulus is created and coverage is collected from outside the virtual machine by first stopping the virtual machine, depositing stimulus, and then reading coverage directly from the virtual machine memory while the machine is stopped.
Public/Granted literature
- US20100153924A1 Method and System for Performing Software Verification Public/Granted day:2010-06-17
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