A protective circuit for protecting an input or an output of an electrical apparatus against an overvoltage, wherein a series circuit is arranged at the input or the output, the series circuit includes a first transistor and a second transistor, each transistor comprises a gate terminal, a drain terminal and a source terminal, and the drain terminal of the first transistor is connected to a first terminal point and the source terminal of the second transistor is connected to the input or the output and the source terminal of the first transistor is connected to the drain terminal of the second transistor. In addition, the gate terminal of the first transistor is connected via a first resistor to a first pole of a voltage source and the gate terminal of the second transistor is connected via a second resistor to a second pole of the voltage source.