Invention Grant
- Patent Title: III-V finFETs on silicon substrate
- Patent Title (中): 硅衬底上的III-V finFET
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Application No.: US13967102Application Date: 2013-08-14
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Publication No.: US08937299B2Publication Date: 2015-01-20
- Inventor: Anirban Basu , Cheng-Wei Cheng , Amlan Majumdar , Ryan M. Martin , Uzma Rana , Devendra K. Sadana , Kuen-Ting Shiu , Yanning Sun
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Louis J. Percello
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/267 ; H01L29/49 ; H01L29/51

Abstract:
A method for forming fin field effect transistors includes forming a dielectric layer on a silicon substrate, forming high aspect ratio trenches in the dielectric layer down to the substrate, the high aspect ratio including a height to width ratio of greater than about 1:1 and epitaxially growing a non-silicon containing semiconductor material in the trenches using an aspect ratio trapping process to form fins. The one or more dielectric layers are etched to expose a portion of the fins. A barrier layer is epitaxially grown on the portion of the fins, and a gate stack is formed over the fins. A spacer is formed around the portion of the fins and the gate stack. Dopants are implanted into the portion of the fins. Source and drain regions are grown over the fins using a non-silicon containing semiconductor material.
Public/Granted literature
- US20140264446A1 III-V FINFETS ON SILICON SUBSTRATE Public/Granted day:2014-09-18
Information query
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